1. Field of the Invention
The present invention relates in general to the field of signal processing, and more specifically, to power factor correction and a power factor correction controller with feedback reduction.
2. Description of the Related Art
Power control systems provide power factor corrected and regulated output voltages to many applications that utilize a regulated output voltage. FIG. 1 depicts a power control system 100, which includes a switching power converter 102. The switching power converter 102 performs power factor correction and provides constant voltage power to load 112. Voltage source 101 supplies an alternating current (AC) input voltage Vin(t) to a full, diode bridge rectifier 103. The voltage source 101 is, for example, a public utility, and the AC voltage Vin(t) is, for example, a 60 Hz/110 V line voltage or a 50 Hz/220 V line voltage in Europe. The rectifier 103 rectifies the input voltage Vin(t) and supplies a rectified, time-varying, line input voltage Vx(t) to the switching power converter.
The switch 108 of switching power converter 102 regulates the transfer of energy from the line input voltage Vx(t), through inductor 110, to capacitor 106. The inductor current iL ramps ‘up’ when the switch 108 conducts, i.e. is “ON”. The inductor current iL ramps down when switch 108 is nonconductive, i.e. is “OFF”, and supplies current iL to recharge capacitor 106. The time period during which inductor current iL ramps down is commonly referred to as the “inductor flyback time”. In at least one embodiment, the switching power converter 102 operates in discontinuous current mode, i.e. the inductor current iL ramp up time plus the inductor flyback time is less than the period of switch 108. Capacitor 106 supplies stored energy to load 112 while the switch 108 conducts. The capacitor 106 is sufficiently large so as to maintain a substantially constant output voltage Vc(t), as established by a power factor correction (PFC) and output voltage controller 114 (as discussed in more detail below). The output voltage Vc(t) remains substantially constant during constant load conditions. However, as load conditions change, the output voltage Vc(t) changes. The PFC and output voltage controller 114 responds to the changes in Vc(t) and adjusts the control signal CS0 to maintain a substantially constant output voltage as quickly as possible. The output voltage controller 114 includes a small capacitor 115 to filter any high frequency signals from the line input voltage Vx(t).
The power control system 100 also includes a PFC and output voltage controller 114 to control the switch 108 and, thus control power factor correction and regulate output power of the switching power converter 102. The goal of power factor correction technology is to make the switching power converter 102 appear resistive to the voltage source 101. Thus, the PFC and output voltage controller 114 attempts to control the inductor current iL so that the average inductor current iL is linearly and directly related to the line input voltage Vx(t). Prodić, Compensator Design and Stability Assessment for Fast Voltage Loops of Power Factor Correction Rectifiers, IEEE Transactions on Power Electronics, Vol. 22, No. 5, September 2007, pp. 1719-1729 (referred to herein as “Prodić”), describes an example of PFC and output voltage controller 114. The PFC and output voltage controller 114 supplies a pulse width modified (PWM) control signal CS0 to control the conductivity of switch 108. In at least one embodiment, switch 108 is a field effect transistor (FET), and control signal CS0 is the gate voltage of switch 108. The values of the pulse width and duty cycle of control signal CS0 depend on two feedback signals, namely, the line input voltage Vx(t) and the capacitor voltage/output voltage Vc(t).
Switching power converter 114 receives two feedback signals, the line input voltage Vx(t) and the output voltage Vc(t), via a wide bandwidth current loop 116 and a slower voltage loop 118. The current loop 116 operates at a frequency fc that is sufficient to allow the PFC and output controller 114 to respond to changes in the line input voltage Vx(t) and cause the inductor current iL to track the line input voltage to provide power factor correction. The current loop frequency is generally set to a value between 20 kHz and 150 kHz. The voltage loop 118 operates at a much slower frequency fv, typically 10-20 Hz. The capacitor voltage Vc(t) includes a ripple component having a frequency equal to twice the frequency of input voltage Vin(t), e.g. 120 Hz. Thus, by operating at 10-20 Hz, the voltage loop 118 functions as a low pass filter to filter the ripple component.
PFC and output voltage controller 114 is often implemented as an integrated circuit (IC). Thus, the PFC and output voltage controller 114 includes two respective pins to connect to the current feedback loop 118. Pins can be relatively expensive components of the IC. Additionally, high voltage components, such as high voltage resistors, in the voltage loop 118 also increase the cost of PFC and output voltage controller 114.